* Atheros MB82 base, AR9160+AR9106
* High power Design, RF power up to 26dBm@5GHz & 28dBm@2.4GHz
* RX filter designed to minimize the radio conflict under 5GHz & 2.4GHz con-current mode
(Two radios working simultanuously in one platform without interference issues)
* 3dB TX linearity improved from standard MB82
* Dual band supports 3x3 802.11a/b/g/n, datarate up to 300Mbps@HT40
* Dual power supply 3.3Vdc+5.0Vdc
* Size : 65.8 ±0.1mm (L/H) x 59.6 ±0.1mm (W)
* Three MMCX connectors
* Operation temp. : -40~75 degrees C
* With ESD protector
The EW-DNMA-H5 is a mini-PCI card for IEEE 802.11 a/b/g/n wireless LAN module. It is based on the Atheros MB82 solution (AR9160+AR9106), High power Design, RF power up to 26dBm@5GHz & 28dBm@2.4GHz, and Industrial Operating Temperature of -40C ~ +75C.
The EW-DNMA-H5 chipset Atheros AR9160 MAC/BB processor, MAC/Baseband Processor is part of the AR9001 chipset solutions for 2.4 and 5GHz 802.11n-ready wireless local area networks (WLANs), enabling high-performance 2x2, 2x3, 3x3 MIMO configurations for access point (AP) and router applications that demand robust link quality and range. The AR9160 integrates a multi-protocol media access control (MAC), baseband processor, and analog-to-digital and digital-to-analog (ADC/DAC) converter into an all-CMOS device for lowest power and form factor. For example, together with the AR9106 2.4/5GHz 802.11n MIMO radio, the chipset supports up to a 3 Tx chain. 3 Rx chain, and 2 stream MIMO configuration. THe AR9160 implements half-duplex OFDM, CCK, and DSSS baseband processing, supporting 130 Mbps
and 300 Mbps for 20 MHz and 40 MHz channel operations respectively, and all IEEE 802.11 a/b/g/n data rates.
The EW-DNMA-H5 Radio Transceiver, Atheros AR9106 is part of the AR9001 chipset solutions for 2.4/5GHz 802.11n-ready wireless local area network (WLAN). The AR9106 supports two simultaneous traffic streams using up to three integrated transmit chains and receive chains for high throughput and range performance. Transmit chains combine baseband in-phase (I) and quadrature (Q) signals, convert them to the desired frequency, and drive the RF signal to multiple antennas. Receive chains use an integrated dual conversion architecture and require no off-chip intermediate frequency (IF) filters. The frequency synthesizer supports one-MHz steps to match frequencies defined by IEEE 802.11a/b/g/n specifications.
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